58.4: 10-Bit Column Driver with Split-DAC Architecture
نویسندگان
چکیده
An 8-bit coarse digital-to-analog converter (DAC), which adopts both array and tree-type decoders, is combined with a 2-bit fine interpolation DAC to reduce RC time delay and die area of a column driver for LCD-HDTV applications. Error amplifiers drive a pair of column lines in the output buffer to realize rail-torail voltage swing with a high slew rate. The design has been fabricated in 0.3 μm LV-HV CMOS technology.
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